tsmc bucks trend, skips high-na euv for next-gen chips
Hsinchu, Thursday, 29 May 2025.
tsmc is forging its own path. The world’s largest contract chipmaker will not be adopting asml’s high numerical aperture extreme ultraviolet lithography for its a16 and a14 process technologies. This decision comes despite intel’s plans to integrate the tech. Tsmc believes its current low-na euv tools, combined with internal advancements, are sufficient. The company’s 1.4 nm process, set for 2028, boasts a 20% increase in transistor density without needing asml’s expensive new equipment, which costs nearly $400 million per machine.
strategic decision-making
Kevin Zhang, TSMC’s Senior Vice President, stated the company will adopt High-NA EUV when it provides a ‘meaningful, measurable benefit’ and a strong return on investment [1]. TSMC’s technology team is focused on extending the lifespan of current Low-NA EUV technology [2]. They aim to maximize the scaling benefits before transitioning to the more expensive High-NA EUV [1]. This approach allows TSMC to carefully evaluate the optimal time to integrate the new technology, balancing cost and performance gains [1].
performance and efficiency gains
TSMC’s A14 process, slated for mass production in 2028, promises significant performance improvements [1]. It is expected to deliver up to 15% higher performance at the same power level or reduce power consumption by 25% to 30% at the same frequency compared to its predecessor [1]. The A14 process will also increase transistor density by 20% for mixed logic/SRAM/analog configurations and up to 23% for pure logic designs [1]. These advancements underscore TSMC’s commitment to pushing technological boundaries without immediate reliance on High-NA EUV [1].
competitive landscape
Intel plans to use High-NA EUV in its 14A manufacturing technology, expected around 2027-2028 [1]. This move is part of Intel’s strategy to regain its competitive edge in the chip manufacturing sector [2]. ASML’s CEO anticipates chipmakers will continue testing High-NA tools through 2026 and 2027 before deploying them on a large scale [3]. TSMC’s current stance reflects a different risk assessment compared to Intel, prioritizing proven technology and cost-effectiveness [1][2].
potential stock impact
TSMC’s decision to delay High-NA EUV adoption could have several implications for its stock (TSM:NYSE). The move signals a focus on capital discipline, potentially boosting investor confidence [GPT]. By maximizing existing equipment, TSMC aims to maintain profitability and manage costs effectively [1]. However, the market may perceive this as a cautious approach, especially if Intel gains a significant advantage using High-NA EUV [2]. Investors will closely monitor TSMC’s ability to maintain its market leadership and technological edge without early adoption of the new lithography [GPT].
manufacturing capacity and geopolitical considerations
The decision not to rush into High-NA EUV may ease some pressure on TSMC’s manufacturing capacity [alert! ‘no direct source explicitly states this, but it is a logical inference’]. The company can continue to leverage its existing infrastructure and expertise [1]. Geopolitical risks remain a key factor, with TSMC’s strategic importance to the global chip supply chain [GPT]. By optimizing current technology, TSMC reduces its immediate dependence on new, complex equipment, potentially mitigating some supply chain vulnerabilities [alert! ‘no direct source explicitly states this, but it is a logical inference’]. However, long-term competitiveness will hinge on eventually integrating High-NA EUV at the right moment [1].