tsmc's santa clara symposium: unveiling chip tech's future

2025-04-23 tsmc

Santa Clara, Wednesday, 23 April 2025.
tsmc’s north america technology symposium in santa clara is the place to be. industry leaders, clients, and tech enthusiasts will converge to explore the latest advancements in semiconductor technology. key discussions will focus on tsmc’s strategic direction. analog bits will showcase its ip portfolio on tsmc’s 3nm and 2nm processes. avicena will collaborate with tsmc to optimize photodetector arrays. moschip will showcase its silicon engineering services. get ready for insights into cutting-edge solutions and future plans that will shape the industry.

symposium highlights and expectations

The TSMC 2025 North America Technology Symposium in Santa Clara is set to provide critical insights into the company’s future strategies and technological advancements [1]. This symposium serves as a platform for TSMC to engage with clients and display its newest technologies [1]. Attendees can anticipate discussions on TSMC’s progress in advanced logic technology. These include 5nm, 4nm, 3nm, 2nm, and A16 processes [8]. The event will also cover developments in 3D fabric advanced silicon stacking and packaging technologies [8].

analog bits’ ip showcase

Analog Bits is slated to demonstrate its IP portfolio at the TSMC symposium [2]. The demonstrations will feature their newest low dropout regulator (LDO) IP, power supply droop detectors, and embedded clock LC PLLs on the TSMC N3P process [2]. They will also display clocking, high-accuracy PVT, and droop detectors on the TSMC N2P process [2]. These demonstrations will highlight Analog Bits’ mixed-signal IP in TSMC’s advanced 5nm, 3nm, and 2nm processes [2].

avicena and tsmc collaborate on interconnects

Avicena announced its collaboration with TSMC to optimize photodetector arrays for its LightBundle microLED-based interconnects [5]. Avicena’s LightBundle supports high shoreline density and extends die-to-die connections [5]. It achieves data rates exceeding 1 Tbps/mm and extends connections beyond 10 meters, while maintaining energy efficiency [5]. Lucas Tsai, Vice President of Business Management at TSMC North America, expressed excitement about collaborating with Avicena to advance AI infrastructure [5].

moschip’s silicon engineering services

MosChip Technologies is participating in the TSMC 2025 North America Technology Symposium [6][7]. They plan to showcase their capabilities in Turnkey ASIC, Silicon Design, and IP Services [6][7]. MosChip is a member of the TSMC Design Center Alliance (DCA) [3]. MosChip will highlight its expertise across advanced technology nodes, packaging, testing, and production workflows [6][7]. MosChip has a proven record with over 200 SoC tapeouts [3][6][7].

stock implications and market leadership

The announcements and presentations at the symposium are expected to influence TSMC’s stock (TSM:NYSE) [GPT]. Positive news regarding manufacturing capacity advancements could boost investor confidence [GPT]. Successful demonstrations of advanced technologies like 2nm and 3nm processes may strengthen TSMC’s market leadership narrative [2][8]. Collaborations, such as the one with Avicena, could signal TSMC’s commitment to innovation, potentially attracting more investment [5]. Geopolitical risks remain a factor, but technological progress can help mitigate these concerns [GPT].

Bronnen

technology symposium client engagement